Issued Patents 2025
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417792 | Jitter reduction in mixed-signal processing circuits | Srikanth Reddy Gruddanti, David Lin, Manoj N. Kulkarni, Priyadarshi Saxena | 2025-09-16 |
| 12386750 | Last level cache hierarchy in chiplet based processors | Srikanth Reddy Gruddanti, Krishnaiah Gummidipudi, David Hugh McIntyre, Ramon Mangaser | 2025-08-12 |
| 12321294 | Data lane variation compensation for data rate enhancement | Srikanth Reddy Gruddanti, David Hugh McIntyre, Ramon Mangaser, Manoj N. Kulkarni | 2025-06-03 |
| 12231120 | Apparatus, system, and method for improving latency or power consumption | Jagadeesh Anathahalli Singrigowda, Girish A S, Aniket Bharat Waghide | 2025-02-18 |