Issued Patents 2024
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12166121 | Integrated circuit structure | Cheng-Bo Shu | 2024-12-10 |
| 12165955 | Semiconductor arrangement and method for making | Josh Lin, Chung-Jen Huang, Tsung-Yu Yang | 2024-12-10 |
| 12144173 | Seal method to integrate non-volatile memory (NVM) into logic or bipolar CMOS DMOS (BCD) technology | Cheng-Bo Shu, Chung-Jen Huang | 2024-11-12 |
| 12114503 | Integrated chip including a tunnel dielectric layer which has different thicknesses over a protrusion region of a substrate | Jui-Yu Pan, Cheng-Bo Shu, Chung-Jen Huang, Jing-Ru Lin, Tsung-Yu Yang +1 more | 2024-10-08 |
| 12094984 | Semiconductor device | Cheng-Bo Shu, Chung-Jen Huang | 2024-09-17 |
| 12040397 | Gate electrode extending into a shallow trench isolation structure in high voltage devices | Yuan-Cheng Yang, Shih-Jung Tu | 2024-07-16 |
| 11990545 | Semiconductor device having fully oxidized gate oxide layer and method for making the same | Tsu-Hsiu Perng, Chia-Chen Chang, Cheng-Bo Shu, Jyun-Guan Jhou, Pei-Lun Wang | 2024-05-21 |
| 11894425 | Semiconductor arrangement and method of manufacture | Tsung-Yu Yang, Cheng-Bo Shu, Chien-Hung Liu | 2024-02-06 |