Issued Patents 2024
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125850 | Buried metal track and methods forming same | Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Hui-Zhong Zhuang, Jung-Chan Yang +6 more | 2024-10-22 |
| 12080647 | Integrated circuit, system and method of forming the same | Pochun Wang, Wei-Hsin TSAI, Chih-Liang Chen, Li-Chun Tien | 2024-09-03 |
| 12079559 | IC device layout method | Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Jiann-Tyng Tzeng | 2024-09-03 |
| 12074168 | Semiconductor device and method of manufacturing the same | Jerry Chang Jui Kao, Chih-Liang Chen, Hui-Zhong Zhuang, Jung-Chan Yang, Lee-Chung Lu +1 more | 2024-08-27 |
| 12033935 | Semiconductor device including recessed interconnect structure | Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu | 2024-07-09 |
| 12027461 | Semiconductor device including buried conductive fingers and method of making the same | Chih-Liang Chen, Li-Chun Tien | 2024-07-02 |
| 12027598 | Buried pad for use with gate-all-around device | Pochun Wang, Chih-Liang Chen, Li-Chun Tien | 2024-07-02 |
| 11984441 | Integrated circuit with backside power rail and backside interconnect | Shih-Wei Peng, Jiann-Tyng Tzeng | 2024-05-14 |
| 11967596 | Power rail and signal conducting line arrangement | Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien +1 more | 2024-04-23 |
| 11948886 | Semiconductor device and methods of manufacturing same | Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien | 2024-04-02 |
| 11942420 | Semiconductor device including recessed interconnect structure | Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu | 2024-03-26 |
| 11916017 | Signal conducting line arrangements in integrated circuits | Wei Ling Chang, Chih-Liang Chen, Chia-Tien Wu | 2024-02-27 |
| 11894383 | Staking nanosheet transistors | Pochun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien | 2024-02-06 |