Issued Patents 2024
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12093193 | High throughput digital filter architecture for processing unary coded data | Rupesh SINGH | 2024-09-17 |
| 12088326 | Sigma-delta analog-to-digital converter circuit with data sharing for power saving | Abhishek Jain | 2024-09-10 |
| 12086568 | High throughput parallel architecture for recursive sinusoid synthesizer | Rupesh SINGH | 2024-09-10 |
| 12055989 | Clock delay circuit for chip reset architecture | Vikas Chelani | 2024-08-06 |
| 12009830 | Timing skew mismatch calibration for time interleaved analog to digital converters | Vikram Singh | 2024-06-11 |
| 11989148 | Data bridge for interfacing source synchronous datapaths with unknown clock phases | Rupesh SINGH | 2024-05-21 |
| 11979167 | Low power and high speed data weighted averaging (DWA) to binary converter circuit | Sharad Gupta | 2024-05-07 |
| 11933861 | Phase-independent testing of a converter | Sharad Gupta | 2024-03-19 |
| 11921537 | Method and circuit for calibration of high-speed data interface | Jeet Narayan Tiwari | 2024-03-05 |
| 11909410 | Sigma-delta analog-to-digital converter circuit with real time correction for digital-to-analog converter mismatch error | Sharad Gupta | 2024-02-20 |
| 11901919 | On chip test architecture for continuous time delta sigma analog-to-digital converter | Abhishek Jain, Sharad Gupta | 2024-02-13 |