Issued Patents 2024
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12148478 | Erase method for non-volatile memory with multiple tiers | Xiang Yang, Masaaki Higashitani, Dengtao Zhao | 2024-11-19 |
| 12087363 | Control gate signal for data retention in nonvolatile memory | Anubhav Khandelwal | 2024-09-10 |
| 12046305 | Pre-position dummy word line to facilitate write erase capability of memory apparatus | Xiang Yang | 2024-07-23 |
| 11972808 | Recovery pulses to counter cumulative read disturb | Xiang Yang | 2024-04-30 |
| 11972818 | Refresh frequency-dependent system-level trimming of verify level offsets for non-volatile memory | Xiang Yang | 2024-04-30 |
| 11961572 | Edge word line data retention improvement for memory apparatus with on-pitch semi-circle drain side select gate technology | Xiang Yang, Shubhajit Mukherjee | 2024-04-16 |
| 11961573 | Memory device that is optimized for operation at different temperatures | Xiang Yang, Dengtao Zhao | 2024-04-16 |
| 11894051 | Temperature-dependent word line voltage and discharge rate for refresh read of non-volatile memory | Dong-Il Moon, Wei Zhao, Henry Chin | 2024-02-06 |
| 11894067 | Method to fix cumulative read induced drain side select gate downshift in memory apparatus with on-pitch drain side select gate | Xiang Yang, Shubhajit Mukherjee | 2024-02-06 |
| 11894072 | Two-side staircase pre-charge in sub-block mode of three-tier non-volatile memory architecture | Jiacen Guo, Xiang Yang | 2024-02-06 |