Issued Patents 2024
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12165710 | Memory devices using a dynamic latch to provide multiple bias voltages | Koichi Kawai | 2024-12-10 |
| 12106808 | Semiconductor storage device | Mai Shimizu, Koji Kato, Mario Sako | 2024-10-01 |
| 12080356 | Methods of forming integrated circuit structures for capacitive sense NAND memory | Yoshiaki Fukuzumi, Jun Fujiki, Shuji Tanaka, Masashi Yoshida, Masanobu Saito | 2024-09-03 |
| 11915758 | Memory devices with four data line bias levels | Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning +2 more | 2024-02-27 |
| 11862248 | Semiconductor storage device | Mai Shimizu, Koji Kato, Mario Sako | 2024-01-02 |