Issued Patents 2024
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12100467 | Systems and methods for testing redundant fuse latches in a memory device | Yoshinori Fujiwara, Takuya Tamano, Jason Johnson, Daniel S. Miller | 2024-09-24 |
| 12100476 | Test mode security circuit | Kari Crane, Yoshinori Fujiwara, Jason Johnson, Takuya Tamano, Daniel S. Miller | 2024-09-24 |
| 12079076 | Apparatuses, systems, and methods for error correction | Yoshinori Fujiwara, Vivek Kotti, Christopher G. Wieduwilt, Jason Johnson | 2024-09-03 |
| 11955160 | Asynchronous signal to command timing calibration for testing accuracy | Yoshinori Fujiwara, Jason Johnson, Daniel S. Miller | 2024-04-09 |