Issued Patents 2024
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182018 | Instruction and micro-architecture support for decompression on core | Jayesh Gaur, Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney | 2024-12-31 |
| 12175246 | Systems and methods for performing matrix compress and decompress instructions | Dan Baum, Michael Espig, James D. Guilford, Raanan Sade, Christopher J. Hughes +7 more | 2024-12-24 |
| 12175274 | Process-based multi-key total memory encryption | Vinodh Gopal, Kirk S. Yap, Sean M. Gulley, Raghunandan Makaram | 2024-12-24 |
| 12130738 | Compressed cache memory with decompress on fault | Vedvyas Shanbhogue, Jayesh Gaur, Vinodh Gopal, Utkarsh Y. Kakaiya | 2024-10-29 |
| 12028094 | Application programming interface for fine grained low latency decompression within processor core | Jayesh Gaur, Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney | 2024-07-02 |
| 11989582 | Apparatus and method for low-latency decompression acceleration via a single job descriptor | James D. Guilford, George Powley, Vinodh Gopal | 2024-05-21 |
| 11955995 | Apparatus and method for two-stage lossless data compression, and two-stage lossless data decompression | James D. Guilford, Vinodh Gopal, Daniel F. Cutter, Kirk S. Yap, George Powley | 2024-04-09 |
| 11900108 | Rotate instructions that complete execution either without writing or reading flags | Vinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Erdinc Ozturk, Martin G. Dixon +5 more | 2024-02-13 |