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Instruction and micro-architecture support for decompression on core |
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Compressed cache memory with decompress on fault |
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| 12086591 |
Device, method and system to predict an address collision by a load and a store |
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| 12028094 |
Application programming interface for fine grained low latency decompression within processor core |
Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney, Wajdi K. Feghali |
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| 12020033 |
Apparatus and method for hardware-based memoization of function calls to reduce instruction execution |
Niranjan Soundararajan, Sreenivas Subramoney, S R Swamy Saranam Chongala |
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| 11972126 |
Data relocation for inline metadata |
David M. Durham, Michael LeMay, Sergej Deutsch, Joydeep Rakshit, Anant Vithal Nori +1 more |
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