Jayesh Gaur — 6 Patents at Intel

Issued Patents 2024

Showing 1–6 of 6 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12182018	Instruction and micro-architecture support for decompression on core	Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney, Wajdi K. Feghali	2024-12-31	$16,542,000
12130738	Compressed cache memory with decompress on fault	Vedvyas Shanbhogue, Wajdi K. Feghali, Vinodh Gopal, Utkarsh Y. Kakaiya	2024-10-29	$18,861,000
12086591	Device, method and system to predict an address collision by a load and a store	Sudhanshu Shukla, Stanislav Shwartsman, Pavel I. Kryukov	2024-09-10	$16,964,000
12028094	Application programming interface for fine grained low latency decompression within processor core	Adarsh Chauhan, Vinodh Gopal, Vedvyas Shanbhogue, Sreenivas Subramoney, Wajdi K. Feghali	2024-07-02	$27,114,000
12020033	Apparatus and method for hardware-based memoization of function calls to reduce instruction execution	Niranjan Soundararajan, Sreenivas Subramoney, S R Swamy Saranam Chongala	2024-06-25	$22,163,000
11972126	Data relocation for inline metadata	David M. Durham, Michael LeMay, Sergej Deutsch, Joydeep Rakshit, Anant Vithal Nori +1 more	2024-04-30	$26,151,000