Issued Patents 2024
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12175176 | Fast synthesis of logical circuit design with predictive timing | Peter Moceyunas, Jiong Luo, Casey The, Jovanka Ciric Vujkovic, Patrick Vuillod | 2024-12-24 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12175176 | Fast synthesis of logical circuit design with predictive timing | Peter Moceyunas, Jiong Luo, Casey The, Jovanka Ciric Vujkovic, Patrick Vuillod | 2024-12-24 |