JL

Jiong Luo

SY Synopsys: 1 patents #48 of 291Top 20%
Overall (2024): #415,321 of 561,600Top 75%
1
Patents 2024

Issued Patents 2024

Patent #TitleCo-InventorsDate
12175176 Fast synthesis of logical circuit design with predictive timing Peter Moceyunas, Luca Gaetano Amaru, Casey The, Jovanka Ciric Vujkovic, Patrick Vuillod 2024-12-24