Issued Patents 2024
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12068238 | Back-end-of-line (BEOL) high resistance (Hi-R) conductor layer in a metal oxide metal (MOM) capacitor | John Jianhong Zhu, Haining Yang | 2024-08-20 |
| 12057394 | Three-dimensional (3D) interconnect structures employing via layer conductive structures in via layers and related fabrication methods | Xia Li, Bin Yang | 2024-08-06 |
| 11942414 | Integrated circuits (ICs) employing directly coupled metal lines between vertically-adjacent interconnect layers for reduced coupling resistance, and related methods | John Jianhong Zhu, Giridhar Nallapati | 2024-03-26 |
| 11901427 | Gate contact isolation in a semiconductor | Haining Yang | 2024-02-13 |
| 11901434 | Semiconductor having a source/drain contact with a single inner spacer | Haining Yang, Youseok Suh | 2024-02-13 |