Issued Patents 2024
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176042 | Operating a chalcogenide memory with vertical word and vertical word switching elements | Agostino Pirovano, Fabio Pellizzer | 2024-12-24 |
| 12125540 | Write latency and energy using asymmetric cell design | Mattia Robustelli | 2024-10-22 |
| 12080365 | Analog storage using memory device | Mattia Boniardi | 2024-09-03 |
| 12075714 | Random number generation based on threshold voltage randomness | Matteo Impalà, Cécile Colette Solange Nail | 2024-08-27 |
| 12033695 | Techniques for multi-level chalcogenide memory cell programming | Alessandro Sebastiani, Mattia Robustelli, Matteo Impalà | 2024-07-09 |
| 12014779 | Programming techniques for polarity-based memory cells | Mattia Boniardi, Mattia Robustelli | 2024-06-18 |
| 11996141 | Reading a multi-level memory cell | Mattia Robustelli, Fabio Pellizzer, Agostino Pirovano | 2024-05-28 |
| 11984191 | Pulse based multi-level cell programming | Hernan A. Castro, Mattia Boniardi | 2024-05-14 |
| 11942183 | Adaptive write operations for a memory device | Mattia Boniardi, Richard K. Dodge, Mattia Robustelli, Mario Allegra | 2024-03-26 |
| 11923002 | Varying-polarity read operations for polarity-written memory cells | Hari Giduturi, Fabio Pellizzer | 2024-03-05 |
| 11922056 | Neural network memory | Mattia Boniardi | 2024-03-05 |
| 11915750 | Memory device and method for operating the same | Marco Sforzin, Paolo Amato | 2024-02-27 |
| 11887661 | Cross-point pillar architecture for memory arrays | Fabio Pellizzer, Mattia Robustelli, Alessandro Sebastiani | 2024-01-30 |
| 11869585 | Segregation-based memory | Mattia Boniardi, Agostino Pirovano | 2024-01-09 |