Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170120 | Built-in self test circuit for segmented static random access memory (SRAM) array input/output | Hitesh Chawla, Tanuj KUMAR, Harsh Rawat, Kedar Janardan Dhori, Manuj AYODHYAWASI +2 more | 2024-12-17 |