SG

Sachin Ramesh Gugwad

CS Cadence Design Systems: 2 patents #13 of 141Top 10%
Overall (2024): #120,996 of 561,600Top 25%
2
Patents 2024

Issued Patents 2024

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12183427 System and method for write clock double data rate duty cycle correction Hari Anand Ravi 2024-12-31
11979262 Identifying and training floating tap for decision feedback equalization Hari Anand Ravi 2024-05-07