PR

Prateek Kumar Rai

CS Cadence Design Systems: 1 patents #31 of 141Top 25%
📍 Atrauli, IN: #9 of 64 inventorsTop 15%
Overall (2024): #308,008 of 561,600Top 55%
1
Patents 2024

Issued Patents 2024

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11947887 Test-point flop sharing with improved testability in a circuit design Krishna Vijaya Chakravadhanula, Brian Foutz, Sarthak Singhal, Christos Papameletis, Vivek Chickermane 2024-04-02