Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12174785 | Coprocessors with bypass optimization, variable grid architecture, and fused vector operations | Aditya Kesiraju, Andrew J. Beaumont-Smith, Boris S. Alvarez-Heredia, Ran A. Chachick | 2024-12-24 |
| 11914524 | Latency management in synchronization events | Adrian Montero, Huzefa Sanjeliwala, Paul Kitchin, Prarthna Santhanakrishnan, Conrado Blasco | 2024-02-27 |