Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12174785 | Coprocessors with bypass optimization, variable grid architecture, and fused vector operations | Andrew J. Beaumont-Smith, Boris S. Alvarez-Heredia, Pradeep Kanapathipillai, Ran A. Chachick | 2024-12-24 |
| 12135681 | Coprocessors with bypass optimization, variable grid architecture, and fused vector operations | Andrew J. Beaumont-Smith, Boris S. Alvarez-Heredia, Ran A. Chachick | 2024-11-05 |