Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164353 | Frequency/state based power management thresholds | Ashish Jain | 2024-12-10 |
| 12164365 | Buffer display data in a chiplet architecture | Gia Tung Phan, Ashish Jain | 2024-12-10 |
| 11899520 | Dynamic cache bypass for power savings | Ashish Jain, Benjamin Tsien, Chintan S. Patel, Vydhyanathan Kalyanasundharam | 2024-02-13 |