Issued Patents 2024
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12086521 | Circuit design simulation and clock event reduction | Tharun Kumar Ksheerasagar, Hemant Kashyap, Pratyush Ranjan | 2024-09-10 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12086521 | Circuit design simulation and clock event reduction | Tharun Kumar Ksheerasagar, Hemant Kashyap, Pratyush Ranjan | 2024-09-10 |