NJ

Nuwan Jayasena

AM AMD: 14 patents #4 of 1,033Top 1%
Overall (2024): #4,835 of 561,600Top 1%
14
Patents 2024

Issued Patents 2024

Patent #TitleCo-InventorsDate
12131026 Adaptive scheduling of memory and processing-in-memory requests Alexandru Dutu, Niti Madan 2024-10-29
12124531 Device and method for accelerating matrix multiply operations Shaizeen Aga, Allen H. Rush, Michael Ignatowski 2024-10-22
12099866 Address mapping-aware tasking mechanism Jonathan Alsop, Shaizeen Aga 2024-09-24
12033714 Interconnect architecture for three-dimensional processing systems Yasuko Eckert 2024-07-09
12019560 Virtual partitioning a processor-in-memory (“PIM”) Sooraj Puthoor, Muhammad Amber Hassaan, Ashwin Aji, Michael L. Chu 2024-06-25
11954036 Prefetch kernels on data-parallel processors James M. O'Connor, Michael Mantor 2024-04-09
11934827 Partition and isolation of a processing-in-memory (PIM) device Sooraj Puthoor, Muhammad Amber Hassaan, Ashwin Aji, Michael L. Chu 2024-03-19
11934698 Process isolation for a processor-in-memory (“PIM”) device Sooraj Puthoor, Muhammad Amber Hassaan, Ashwin Aji, Michael L. Chu 2024-03-19
11900161 Memory allocation for processing-in-memory operations Anirban Nag, Shaizeen Aga 2024-02-13
11899642 System and method using hash table with a set of frequently-accessed buckets and a set of less frequently-accessed buckets 2024-02-13
11893502 Dynamic hardware selection for experts in mixture-of-experts model Nicholas Malaya 2024-02-06
11875425 Implementing heterogeneous wavefronts on a graphics processing unit (GPU) Sooraj Puthoor, Bradford M. Beckmann, Anthony Gutierrez 2024-01-16
11874739 Error detection and correction in memory modules using programmable ECC engines Sudhanva Gurumurthi, Vilas Sridharan, Shaizeen Aga, Michael Ignatowski, Shrikanth Ganapathy +1 more 2024-01-16
11868254 Using epoch counter values for controlling the retention of cache blocks in a cache 2024-01-09