Issued Patents 2024
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12169896 | Graphics primitives and positions through memory buffers | Todd Martin, Tad Robert Litwiller, Nishank Pathak, Randy Wayne Ramsey, Christopher J. Brennan +2 more | 2024-12-17 |
| 12153958 | VMID as a GPU task container for virtualization | Anirudh R. Acharya, Rex Eldon McCrary, Anthony Asaro, Jeffrey G. Cheng, Mark Fowler | 2024-11-26 |
| 12153957 | Hierarchical work scheduling | Matthaeus G. Chajdas, Christopher J. Brennan, Robert W. Martin, Nicolai Haehnle | 2024-11-26 |
| 12067401 | Stream processor with low power parallel matrix multiply pipeline | Jiasheng Chen, Yunxiao Zou, Allen H. Rush | 2024-08-20 |
| 12032487 | Access log and address translation log for a processor | Benjamin T. Sander, Mark Fowler, Anthony Asaro, Gongxian Jeffrey Cheng | 2024-07-09 |
| 11995149 | Sparse matrix-vector multiplication | Sateesh Lagudu, Allen H. Rush | 2024-05-28 |
| 11954782 | Hybrid render with preferred primitive batch binning and sorting | Laurent Lefebvre, Mikko Alho, Mika Tuomi, Kiia Kallio | 2024-04-09 |
| 11954036 | Prefetch kernels on data-parallel processors | Nuwan Jayasena, James M. O'Connor | 2024-04-09 |
| 11948223 | Redundancy method and apparatus for shader column repair | Jeffrey T. Brady, Angel E. Socarras | 2024-04-02 |
| 11880683 | Packed 16 bits instruction pipeline | Jiasheng Chen, Bin He, Yunxiao Zou, Radhakrishna Giduthuri, Eric J. Finger +1 more | 2024-01-23 |
| 11880926 | Hybrid render with deferred primitive batch binning | Laurent Lefebvre, Mark Fowler, Timothy Kelley, Mikko Alho, Mika Tuomi +4 more | 2024-01-23 |