Issued Patents 2023
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11853681 | Post-routing congestion optimization | Ching-Hsiang Hsu, Heng-Yi Lin | 2023-12-26 |
| 11853675 | Method for optimizing floor plan for an integrated circuit | Shi-Wen TAN, Song Liu, Shih-Yao Lin, Wen-Yuan FANG | 2023-12-26 |
| 11816417 | Rule check violation prediction systems and methods | Henry Lin, Szu-Ju Huang, Yin-An Chen, Amos Hong | 2023-11-14 |
| 11709987 | Method and system for generating layout design of integrated circuit | Shih-Yao Lin, Yin-An Chen, Shih Feng Hong | 2023-07-25 |
| 11604917 | Static voltage drop (SIR) violation prediction systems and methods | Henry Lin, Szu-Ju Huang, Yin-An Chen, Amos Hong | 2023-03-14 |
| 11568119 | Cell layout of semiconductor device | Huang-Yu Chen, Yun-Han Lee | 2023-01-31 |
| 11562118 | Hard-to-fix (HTF) design rule check (DRC) violations prediction | Ching-Hsiang Hsu, Shih-Yao Lin | 2023-01-24 |