Issued Patents 2023
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855201 | Semiconductor structure | Chia-Ming Pan, Chia-Ta Hsieh, Yun-Chi Wu | 2023-12-26 |
| 11855071 | BCD device layout area defined by a deep trench isolation structure and methods for forming the same | Tsung-Yu Yang | 2023-12-26 |
| 11854621 | ONON sidewall structure for memory device and methods of making the same | Chen-Ming Huang, Wen-Tuo Huang, ShihKuang Yang, Yu-Chun Chang, Shih-Hsien Chen +5 more | 2023-12-26 |
| 11812608 | Semiconductor device and manufacturing method thereof | Tsun-Kai Tsao, Hung-Ling Shih, Shun-Shing Yang, Wen-Tuo Huang, Yong-Shiuan Tsair +1 more | 2023-11-07 |
| 11798836 | Semiconductor isolation structure and method of making the same | Tsung-Yu Yang, Yun-Chi Wu, Yu-Wen Tseng, Chia-Ta Hsieh, Ping-Cheng Li +2 more | 2023-10-24 |
| 11785770 | Strap-cell architecture for embedded memory | Wen-Tuo Huang, Ping-Cheng Li, Hung-Ling Shih, Yu-Ling Hsu, Yong-Shiuan Tsair +2 more | 2023-10-10 |
| 11699488 | Device-region layout for embedded flash | Shih Kuang Yang, Ping-Cheng Li, Hung-Ling Shih, Wen-Tuo Huang, Yu-Ling Hsu +2 more | 2023-07-11 |
| 11670689 | Method for eliminating divot formation and semiconductor device manufactured using the same | Yu-Wen Tseng, Hung-Ling Shih, Tsung-Yu Yang, Tsung-Hua Yang, Yu-Chun Chang | 2023-06-06 |
| 11637113 | Semiconductor device and manufacturing method thereof | ShihKuang Yang, Yong-Shiuan Tsair, Hung-Ling Shih, Yu-Ling Hsu, Chieh-Fei Chiu +1 more | 2023-04-25 |
| 11594597 | Selective polysilicon growth for deep trench polysilicon isolation structure | Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Yu-Chun Chang | 2023-02-28 |
| 11552087 | Strap-cell architecture for embedded memory | Wen-Tuo Huang, Ping-Cheng Li, Hung-Ling Shih, Yu-Ling Hsu, Yong-Shiuan Tsair +2 more | 2023-01-10 |