Issued Patents 2023
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11847058 | Using a second content-addressable memory to manage memory burst accesses in memory sub-systems | Laurent Isenegger, Jeffrey E. Frederiksen | 2023-12-19 |
| 11809710 | Outstanding transaction monitoring for memory sub-systems | Robert M. Walker, Laurent Isenegger | 2023-11-07 |
| 11748273 | Secure data communication with memory sub-system | — | 2023-09-05 |
| 11741008 | Disassociating memory units with a host system | Zhenlei Shen | 2023-08-29 |
| 11740833 | Throttle response signals from a memory system | Trevor Conrad Meyerowitz | 2023-08-29 |
| 11698756 | Cache-based memory read commands | Patrick A. La Fratta | 2023-07-11 |
| 11675705 | Eviction of a cache line based on a modification of a sector of the cache line | Robert M. Walker | 2023-06-13 |
| 11669265 | Memory sub-system-bounded memory function | Robert M. Walker | 2023-06-06 |
| 11656995 | Dynamic access granularity in a cache media | Robert M. Walker | 2023-05-23 |
| 11650755 | Proactive return of write credits in a memory system | Trevor Conrad Meyerowitz | 2023-05-16 |
| 11636047 | Hash operations in memory for data sharing | — | 2023-04-25 |
| 11609855 | Bit masking valid sectors for write-back coalescing | Trevor Conrad Meyerowitz, Fangfang Zhu | 2023-03-21 |
| 11604749 | Direct memory access (DMA) commands for noncontiguous source and destination memory addresses | Laurent Isenegger | 2023-03-14 |
| 11573700 | Buffer management in memory systems for read and write requests | Trevor Conrad Meyerowitz | 2023-02-07 |
| 11573743 | Pointer dereferencing within memory sub-system | — | 2023-02-07 |