Issued Patents 2023
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11788929 | Techniques for wafer level die testing using sacrificial structures | Pradeep Srinivasan | 2023-10-17 |
{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "2023", "item": "https://www.patentleaderboard.com/2023/"}, {"@type": "ListItem", "position": 3, "name": "Intel", "item": "https://www.patentleaderboard.com/2023/company/intel"}, {"@type": "ListItem", "position": 4, "name": "Brett E. Huff", "item": "https://www.patentleaderboard.com/2023/inventor/fl:br_ln:huff-10"}]}
Skip to contentShowing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11788929 | Techniques for wafer level die testing using sacrificial structures | Pradeep Srinivasan | 2023-10-17 |