Issued Patents 2023
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11837605 | Structure including transistor using buried insulator layer as gate dielectric and trench isolations in source and drain | Tom Herrmann, Alban Zaka, Yiching Chen | 2023-12-05 |
| 11664432 | Stress layout optimization for device performance | Dirk Utess, Dominik Martin Kleimaier, Irfan Saadat, Florent Ravaux | 2023-05-30 |