Issued Patents 2023
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11842940 | Semiconductor structure having a thermal shunt below a metallization layer and integration schemes | Ramsey Hazbun, Mark D. Levy, Alvin J. Joseph | 2023-12-12 |
| 11777043 | Photodetectors with substrate extensions adjacent photodiodes | Ramsey Hazbun, John J. Ellis-Monaghan, Rajendran Krishnasamy | 2023-10-03 |
| 11768337 | Couplers including a waveguide core with integrated airgaps | Spencer H. Porter, Mark D. Levy, Yusheng Bian | 2023-09-26 |
| 11764225 | Field effect transistor with shallow trench isolation features within source/drain regions | Anthony K. Stamper, Uzma Rana, Steven M. Shank | 2023-09-19 |
| 11764258 | Airgap isolation structures | Brett T. Cucci, Johnatan A. Kantarovsky, Claire E. Kardos, Sen Liu | 2023-09-19 |
| 11749559 | Bulk substrates with a self-aligned buried polycrystalline layer | Steven M. Shank, Anthony K. Stamper, Ian McCallum-Cook | 2023-09-05 |
| 11749717 | Transistor with embedded isolation layer in bulk substrate | Uzma Rana, Anthony K. Stamper, Johnatan A. Kantarovsky, Steven M. Shank | 2023-09-05 |
| 11728348 | Vertically stacked field effect transistors | Anthony K. Stamper, Steven M. Shank, Michel J. Abou-Khalil | 2023-08-15 |
| 11664412 | Structure providing poly-resistor under shallow trench isolation and above high resistivity polysilicon layer | Michael J. Zierak, Yves T. Ngu, Steven M. Shank | 2023-05-30 |
| 11646351 | Transistor with multi-level self-aligned gate and source/drain terminals and methods | Johnatan A. Kantarovsky, Mark D. Levy, Jeonghyun Hwang, Ajay Raman | 2023-05-09 |
| 11637173 | Structure including polycrystalline resistor with dopant-including polycrystalline region thereunder | Yves T. Ngu, Steven M. Shank, Michael J. Zierak, Mickey H. Yu | 2023-04-25 |
| 11616127 | Symmetric arrangement of field plates in semiconductor devices | Johnatan A. Kantarovsky, Rajendran Krishnasamy, Steven Bentley, Michael J. Zierak, Jeonghyun Hwang | 2023-03-28 |
| 11611002 | Photodiode and/or pin diode structures | Mark D. Levy, Edward W. Kiewra, John J. Ellis-Monaghan | 2023-03-21 |
| 11605649 | Switches in bulk substrate | Mark D. Levy, Alvin J. Joseph, Ramsey Hazbun | 2023-03-14 |
| 11588056 | Structure with polycrystalline active region fill shape(s), and related method | Mark D. Levy, Jagar Singh | 2023-02-21 |
| 11581450 | Photodiode and/or pin diode structures with one or more vertical surfaces | Mark D. Levy, Vibhor Jain, John J. Ellis-Monaghan | 2023-02-14 |
| 11569170 | Substrate with a buried conductor under an active region for enhanced thermal conductivity and RF shielding | Mark D. Levy, Ramsey Hazbun, Alvin J. Joseph, Steven Bentley | 2023-01-31 |
| 11569374 | Implanted isolation for device integration on a common substrate | Mark D. Levy, Jeonghyun Hwang | 2023-01-31 |
| 11567277 | Distributed Bragg reflectors including periods with airgaps | Yusheng Bian, Mark D. Levy | 2023-01-31 |
| 11545577 | Semiconductor structure with in-device high resistivity polycrystalline semiconductor element and method | John J. Ellis-Monaghan, Steven M. Shank, Yves T. Ngu, Michael J. Zierak | 2023-01-03 |
| 11545549 | Semiconductor structures with body contact regions embedded in polycrystalline semiconductor material | Steven M. Shank, Yves T. Ngu, Michael J. Zierak | 2023-01-03 |