Issued Patents 2023
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11809981 | Performing hardware operator fusion | Animesh Jain, Tobias Edler Von Koch, Yizhi Liu, Taemin Kim, Jindrich Zejda +3 more | 2023-11-07 |
| 11809849 | Global modulo allocation in neural network compilation | Hongbin Zheng, Robert Geva | 2023-11-07 |
| 11803736 | Fine-grained sparsity computations in systolic array | Paul Gilbert Meyer, Thiam Khean Hah, Ron Diamant, Vignesh Vivekraja | 2023-10-31 |
| 11797853 | Processing for multiple input data sets | Dana Michelle Vantrease, Ron Diamant, Thomas A. Volpe | 2023-10-24 |
| 11741345 | Multi-memory on-chip computational network | Ron Diamant | 2023-08-29 |
| 11741350 | Efficient utilization of processing element array | Jeffrey T. Huynh, Ron Diamant, Hongbin Zheng, Yizhi Liu, Animesh Jain +5 more | 2023-08-29 |
| 11714992 | Neural network processing based on subgraph recognition | Richard John Heaton, Ron Diamant | 2023-08-01 |
| 11687761 | Improper neural network input detection and handling | Richard John Heaton, Andrea Olgiati, Ron Diamant | 2023-06-27 |
| 11610128 | Neural network training under memory restraint | Sudipta Sengupta, Ron Diamant, Vignesh Vivekraja | 2023-03-21 |
| 11568238 | Dynamic processing element array expansion | Ron Diamant, Richard John Heaton | 2023-01-31 |
| 11567778 | Neural network operation reordering for parallel execution | Jeffrey T. Huynh, Drazen Borkovic, Jindrich Zejda, Ron Diamant | 2023-01-31 |
| 11561833 | Allocation and placement of resources for network computation | Richard John Heaton, Drazen Borkovic, Jindrich Zejda | 2023-01-24 |
| 11562554 | Workload reduction for non-maximum suppression operation | Abinash Mohanty | 2023-01-24 |