Issued Patents 2022
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11527531 | Recessed gate for an MV device | Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky +2 more | 2022-12-13 |
| 11476214 | Sidewall spacer to reduce bond pad necking and/or redistribution layer necking | Alexander Kalnitsky | 2022-10-18 |
| 11469307 | Thicker corner of a gate dielectric structure around a recessed gate electrode for an MV device | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Szu-Hsien Liu, Huan-Chih Yuan | 2022-10-11 |
| 11444169 | Transistor device with a gate structure having recesses overlying an interface between isolation and device regions | Chen-Liang Chu, Chien-Chih Chou, Chih-Chang Cheng, Yi-Huan Chen, Ming-Ta Lei +2 more | 2022-09-13 |
| 11417649 | Semiconductor device | Yi-Sheng Chen, Fu-Jier Fan, Jung-Hui Kao, Yi-Huan Chen, Kau-Chu Lin | 2022-08-16 |
| 11410999 | Boundary design for high-voltage integration on HKMG technology | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky, Ming Chyi Liu, Shih-Chung Hsiao +1 more | 2022-08-09 |
| 11410995 | Semiconductor structure and method of forming thereof | Jhu-Min Song, Chien-Chih Chou, Fu-Jier Fan | 2022-08-09 |
| 11367721 | Semiconductor structure | Jing Huang, Ching-En Chen, Jung-Hui Kao | 2022-06-21 |
| 11302691 | High voltage integration for HKMG technology | Chien-Chih Chou, Fu-Jier Fan, Hsiao-Chin Tuan, Yi-Huan Chen, Alexander Kalnitsky +1 more | 2022-04-12 |
| 11302663 | Film scheme for bumping | Yao-Wen Chang, Chern-Yow Hsu, Cheng-Yuan Tsai | 2022-04-12 |
| 11276684 | Recessed composite capacitor | Yi-Huan Chen, Chien-Chih Chou, Alexander Kalnitsky | 2022-03-15 |
| 11251286 | Method and related apparatus for reducing gate-induced drain leakage in semiconductor devices | Chien-Chih Chou, Hsiao-Chin Tuan, Yi-Huan Chen, Alexander Kalnitsky | 2022-02-15 |