Issued Patents 2022
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11507453 | Low-latency register error correction | Chris Baronne | 2022-11-22 |
| 11488643 | Method for configuring multiple input-output channels | Tony M. Brewer | 2022-11-01 |
| 11442858 | Bias control for a memory device | Bryan Hornung, Tony M. Brewer, David Patrick, Christopher Baronne | 2022-09-13 |
| 11409539 | On-demand programmable atomic kernel loading | Tony M. Brewer, Chris Baronne | 2022-08-09 |
| 11392448 | Payload parity protection for a synchronous interface | Tony M. Brewer | 2022-07-19 |
| 11379402 | Secondary device detection using a synchronous interface | Tony M. Brewer | 2022-07-05 |
| 11379401 | Deferred communications over a synchronous interface | Tony M. Brewer | 2022-07-05 |
| 11379365 | Memory access bounds checking for a programmable atomic operator | Tony M. Brewer, Chris Baronne | 2022-07-05 |
| 11294848 | Initialization sequencing of chiplet I/O channels within a chiplet system | Tony M. Brewer | 2022-04-05 |