Issued Patents 2022
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11501821 | Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same | Hiroyuki Ogawa, Mitsuteru Mushiga | 2022-11-15 |
| 11397635 | Block quality classification at testing for non-volatile memory, and multiple bad block flags for product diversity | Shih-Chung Lee, Takashi Murai | 2022-07-26 |
| 11348649 | Threshold voltage setting with boosting read scheme | Kiyohiko Sakakibara, Hiroki Yabe, Masaaki Higashitani | 2022-05-31 |
| 11342029 | Non-volatile memory with switchable erase methods | Huai-Yuan Tseng | 2022-05-24 |
| 11342006 | Buried source line structure for boosting read scheme | Kiyohiko Sakakibara | 2022-05-24 |
| 11342028 | Concurrent programming of multiple cells for non-volatile memory devices | Xiang Yang, Aaron Lee, Gerrit Jan Hemink, Toru Miwa | 2022-05-24 |
| 11322483 | Three-dimensional memory device containing a shared word line driver across different tiers and methods for making the same | Hiroyuki Ogawa, Mitsuteru Mushiga | 2022-05-03 |
| 11227663 | Boosting read scheme with back-gate bias | Kiyohiko Sakakibara, Ippei Yasuda, Masaaki Higashitani | 2022-01-18 |