KA

Kevin J. Ash

IBM: 30 patents #24 of 7,845Top 1%
📍 Tucson, AZ: #3 of 714 inventorsTop 1%
🗺 Arizona: #13 of 4,079 inventorsTop 1%
Overall (2022): #819 of 548,613Top 1%
30
Patents 2022

Issued Patents 2022

Showing 1–25 of 30 patents

Patent #TitleCo-InventorsDate
11494304 Indicating extents of tracks in mirroring queues based on information gathered on tracks in extents in cache Lokesh M. Gupta, Kyler A. Anderson, Matthew J. Kalos 2022-11-08
11494309 Cache management based on types of I/O operations Kyler A. Anderson, Lokesh M. Gupta 2022-11-08
11474941 Using multi-tiered cache to satisfy input/output requests Beth A. Peterson, Lokesh M. Gupta, Warren K. Stanley, Roger G. Hathorn 2022-10-18
11403562 Determining sectors of a track to stage into cache by training a machine learning module Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-08-02
11379329 Validation of data written via two different bus interfaces to a dual server based storage controller Kyler A. Anderson, Lokesh M. Gupta, Matthew J. Kalos 2022-07-05
11379427 Auxilary LRU list to improve asynchronous data replication performance Gail Spear, Lokesh M. Gupta, Kyler A. Anderson, David B. Schreiber 2022-07-05
11379382 Cache management using favored volumes and a multiple tiered cache memory Lokesh M. Gupta, Beth A. Peterson, Matthew G. Borlick 2022-07-05
11372761 Dynamically adjusting partitioned SCM cache memory to maximize performance Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-06-28
11372778 Cache management using multiple cache memories and favored volumes with multiple residency time multipliers Lokesh M. Gupta, Beth A. Peterson, Matthew G. Borlick 2022-06-28
11372764 Single-copy cache using heterogeneous memory types Lokesh M. Gupta, Matthew G. Borlick, Kyler A. Anderson 2022-06-28
11341407 Selecting a disconnect from different types of channel disconnects by training a machine learning module Beth A. Peterson, Lokesh M. Gupta, Matthew R. Craig 2022-05-24
11321123 Determining an optimum number of threads to make available per core in a multi-core processor complex to executive tasks Brian A. Rinaldi, Lokesh M. Gupta, Matthew J. Kalos, Trung N. Nguyen, Clint A. Hardy +1 more 2022-05-03
11321133 Determining an allocation of stage and destage tasks by using a machine learning module Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-05-03
11321201 Using a mirroring cache list to mirror modified tracks Lokesh M. Gupta, Kyler A. Anderson, Matthew J. Kalos 2022-05-03
11321234 Using a mirroring cache list to demote modified tracks from cache Lokesh M. Gupta, Kyler A. Anderson, Matthew J. Kalos 2022-05-03
11314691 Reserved area to improve asynchronous data replication performance Lokesh M. Gupta, Matthew G. Borlick, Kyler A. Anderson 2022-04-26
11314659 Using real segments and alternate segments in non-volatile storage Kyler A. Anderson, Lokesh M. Gupta, Matthew J. Kalos 2022-04-26
11314649 Using a machine learning module to perform destages of tracks with holes in a storage system Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-04-26
11301394 Using a machine learning module to select one of multiple cache eviction algorithms to use to evict a track from the cache Lokesh M. Gupta, Matthew G. Borlick, Kyler A. Anderson 2022-04-12
11288600 Determining an amount of data of a track to stage into cache using a machine learning module Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-03-29
11281593 Using insertion points to determine locations in a cache list at which to indicate tracks in a shared cache accessed by a plurality of processors Lokesh M. Gupta, Kyler A. Anderson, Matthew J. Kalos 2022-03-22
11281594 Maintaining ghost cache statistics for demoted data elements Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-03-22
11281502 Dispatching tasks on processors based on memory access efficiency Lokesh M. Gupta, Matthew J. Kalos, Trung N. Nguyen 2022-03-22
11281497 Determining an allocation of stage and destage tasks by training a machine learning module Lokesh M. Gupta, Kyler A. Anderson, Matthew G. Borlick 2022-03-22
11263097 Using a track format code in a cache control block for a track in a cache to process read and write requests to the track in the cache Kyler A. Anderson, Lokesh M. Gupta, Matthew J. Kalos, Beth A. Peterson 2022-03-01