SS

Sushobhit Singh

CS Cadence Design Systems: 2 patents #18 of 234Top 8%
📍 Atrauli, IN: #4 of 28 inventorsTop 15%
Overall (2022): #107,227 of 548,613Top 20%
2
Patents 2022

Issued Patents 2022

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
11455450 System and method for performing sign-off timing analysis of electronic circuit designs Arvind Nembili Veeravalli, Naresh Kumar, Beenish, Mahesh D. Sadhankar, Ankit Sethi 2022-09-27
11347915 System and method for objective probing and generation of timing constraints associated with an electronic circuit design Puneet Munjal, Naresh Kumar 2022-05-31