AV

Arvind Nembili Veeravalli

CS Cadence Design Systems: 1 patents #43 of 234Top 20%
Overall (2022): #523,326 of 548,613Top 100%
1
Patents 2022

Issued Patents 2022

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11455450 System and method for performing sign-off timing analysis of electronic circuit designs Sushobhit Singh, Naresh Kumar, Beenish, Mahesh D. Sadhankar, Ankit Sethi 2022-09-27