Issued Patents 2022
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11520731 | Arbitrating throttling recommendations for a systolic array | Thomas A. Volpe | 2022-12-06 |
| 11507378 | Hardware engine with configurable instructions | Sundeep Amirineni, Mohammad El-Shabani, Sagar Sonar, Kenneth Wayne Patton | 2022-11-22 |
| 11501145 | Memory operation for systolic array | Jeffrey T. Huynh | 2022-11-15 |
| 11500962 | Emulating fine-grained sparsity in a systolic array | Paul Gilbert Meyer, Thiam Khean Hah, Randy Renfu Huang, Vignesh Vivekraja | 2022-11-15 |
| 11500802 | Data replication for accelerator | Kun Xu, Patricio Kaplan, Henry Wang | 2022-11-15 |
| 11494326 | Programmable computations in direct memory access engine | Kun Xu | 2022-11-08 |
| 11483296 | Hardware security accelerator | Nafea Bshara, Leah Shalev, Erez Izenberg | 2022-10-25 |
| 11475306 | Processing for multiple input data sets | Dana Michelle Vantrease, Thomas A. Volpe, Randy Renfu Huang | 2022-10-18 |
| 11467973 | Fine-grained access memory controller | Sundeep Amirineni | 2022-10-11 |
| 11468325 | Multi-model training pipeline in distributed systems | Patricio Kaplan | 2022-10-11 |
| 11468304 | Synchronizing operations in hardware accelerator | — | 2022-10-11 |
| 11467992 | Memory access operation in distributed computing system | Patricio Kaplan | 2022-10-11 |
| 11461631 | Scheduling neural network computations based on memory capacity | Dana Michelle Vantrease, Thomas A. Volpe, Randy Renfu Huang | 2022-10-04 |
| 11435941 | Matrix transpose hardware acceleration | Kun Xu, Paul Gilbert Meyer | 2022-09-06 |
| 11429503 | Auto-detection of interconnect hangs in integrated circuits | Noga Smith, Saar Gross | 2022-08-30 |
| 11423313 | Configurable function approximation based on switching mapping table content | Sundeep Amirineni, Mohammad El-Shabani, Kenneth Wayne Patton, Thomas Elmer | 2022-08-23 |
| 11409685 | Data synchronization operation at distributed computing system | Patricio Kaplan | 2022-08-09 |
| 11379555 | Dilated convolution using systolic array | Jeffrey T. Huynh | 2022-07-05 |
| 11354258 | Control plane operation at distributed computing system | Patricio Kaplan | 2022-06-07 |
| 11347480 | Transpose operations using processing element array | Haichen Li, Jeffrey T. Huynh, Yu Zhou, Se-Jong Oh | 2022-05-31 |
| 11334358 | Hardware accelerator having reconfigurable instruction set and reconfigurable decoder | — | 2022-05-17 |
| 11321179 | Powering-down or rebooting a device in a system fabric | Kun Xu, Thomas A. Volpe, Mark Anthony Banse | 2022-05-03 |
| 11314842 | Hardware implementation of mathematical functions | Randy Renfu Huang, Mohammad El-Shabani, Sundeep Amirineni, Kenneth Wayne Patton, Willis Wang | 2022-04-26 |
| 11308396 | Neural network layer-by-layer debugging | Jindrich Zejda, Jeffrey T. Huynh, Drazen Borkovic, Se-Jong Oh, Randy Renfu Huang | 2022-04-19 |
| 11294841 | Dynamically configurable pipeline | Adiel Sarusi, Ori Weber, Erez Izenberg | 2022-04-05 |