Issued Patents 2021
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11151042 | Error cache segmentation for power reduction | Benjamin Louie, Lester Crudele | 2021-10-19 |
| 11119936 | Error cache system with coarse and fine segments for power optimization | Susmita Karmakar, TaeJin Pyon, Kuk-Hwan Kim | 2021-09-14 |
| 11119910 | Heuristics for selecting subsegments for entry in and entry out operations in an error cache system with coarse and fine grain segments | Susmita Karmakar, TaeJin Pyon, Kuk-Hwan Kim | 2021-09-14 |
| 11048633 | Determining an inactive memory bank during an idle memory cycle to prevent error cache overflow | Susmita Karmakar | 2021-06-29 |
| 11010294 | MRAM noise mitigation for write operations with simultaneous background operations | Benjamin Louie, Lester Crudele | 2021-05-18 |
| 10991410 | Bi-polar write scheme | Benjamin Louie, Kadriye Deniz Bozdag | 2021-04-27 |
| 10990465 | MRAM noise mitigation for background operations by delaying verify timing | Benjamin Louie, Lester Crudele | 2021-04-27 |
| 10930332 | Memory array with individually trimmable sense amplifiers | Susmita Karmakar, Mourad El Baraji, Benjamin Louie | 2021-02-23 |
| 10923183 | Memory device comprising electrically floating body transistor | Jin-Woo Han, Yuniarto Widjaja | 2021-02-16 |
| 10891997 | Memory array with horizontal source line and a virtual source line | Mourad El Baraji, Lester Crudele, Benjamin Louie | 2021-01-12 |