| 11151042 |
Error cache segmentation for power reduction |
Neal Berger, Lester Crudele |
2021-10-19 |
| 11100994 |
Content addressable memory device having electrically floating body transistor |
Jin-Woo Han, Yuniarto Widjaja |
2021-08-24 |
| 11010294 |
MRAM noise mitigation for write operations with simultaneous background operations |
Neal Berger, Lester Crudele |
2021-05-18 |
| 10991410 |
Bi-polar write scheme |
Neal Berger, Kadriye Deniz Bozdag |
2021-04-27 |
| 10990465 |
MRAM noise mitigation for background operations by delaying verify timing |
Neal Berger, Lester Crudele |
2021-04-27 |
| 10991697 |
NAND string utilizing floating body memory cell |
Jin-Woo Han, Yuniarto Widjaja |
2021-04-27 |
| 10978455 |
Memory device having electrically floating body transistor |
Yuniarto Widjaja, Jin-Woo Han |
2021-04-13 |
| 10930332 |
Memory array with individually trimmable sense amplifiers |
Susmita Karmakar, Neal Berger, Mourad El Baraji |
2021-02-23 |
| 10891997 |
Memory array with horizontal source line and a virtual source line |
Neal Berger, Mourad El Baraji, Lester Crudele |
2021-01-12 |