| 11188334 |
Obsoleting values stored in registers in a processor based on processing obsolescent register-encoded instructions |
Thomas Andrew Sartorius, Thomas Philip Speier, James Norris Dieffenderfer, Rodney Wayne Smith |
2021-11-30 |
| 11175926 |
Providing exception stack management using stack panic fault exceptions in processor-based devices |
Thomas Andrew Sartorius, James Norris Dieffenderfer, Aaron S. Giles |
2021-11-16 |
| 11126437 |
Load instruction with final read indicator field to invalidate a buffer or cache entry storing the memory address holding load data |
Thomas Andrew Sartorius, Thomas Philip Speier, James Norris Dieffenderfer |
2021-09-21 |
| 11074077 |
Reusing executed, flushed instructions after an instruction pipeline flush in response to a hazard in a processor to reduce instruction re-execution |
Rami Mohammad Al Sheikh |
2021-07-27 |
| 11068273 |
Swapping and restoring context-specific branch predictor states on context switches in a processor |
Rami Mohammad Al Sheikh |
2021-07-20 |
| 10956162 |
Operand-based reach explicit dataflow processors, and related methods and computer-readable media |
Robert Douglas Clancy, Melinda J. Brown, Yusuf Cagatay Tekmen, Brian Michael Stempel, Thomas Philip Speier +3 more |
2021-03-23 |
