Issued Patents 2021
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11199999 | Management of write operations in a non-volatile memory device using a variable pre-read voltage level | Ying Yu Tai | 2021-12-14 |
| 11164641 | Refreshing data stored at a memory component based on a memory component characteristic component | Fangfang Zhu, Ying Yu Tai | 2021-11-02 |
| 11126544 | Method and apparatus for efficient garbage collection based on access probability of data | Ying Yu Tai | 2021-09-21 |
| 11126375 | Arbiter circuit for commands from multiple physical functions in a memory sub-system | Ying Yu Kai | 2021-09-21 |
| 11119697 | Read voltage management based on write-to-read time difference | Ying Yu Tai | 2021-09-14 |
| 11048437 | Double threshold controlled scheduling of memory access commands | Wei Wang, Ying Yu Tai, Jason Duong, Chih-Kuo Kao | 2021-06-29 |
| 10992323 | Early decoding termination for a memory sub-system | Tingjun Xie, Ying Yu Tai | 2021-04-27 |
| 10991445 | Memory sub-system including an in-package sequencer to perform error correction and memory testing operations | Samir Mittal, Ying Yu Tai, Cheng Yuan Wu | 2021-04-27 |
| 10983724 | Controller with distributed sequencer components | Cheng Yuan Wu, Ying Yu Tai | 2021-04-20 |
| 10963342 | Metadata-assisted encoding and decoding for a memory sub-system | Tingjun Xie, Ying Yu Tai | 2021-03-30 |
| 10942809 | Changing of error correction codes based on the wear of a memory sub-system | Tingjun Xie, Ying Yu Tai | 2021-03-09 |
| 10891224 | Maintaining data consistency in a memory sub system that uses hybrid wear leveling operations | Ning Chen, Ying Yu Tai | 2021-01-12 |