| 11200112 |
Method and apparatus to reduce bandwidth overhead of CRC protection on a memory channel |
Kevin M. Mcilvain, Stephen P. Glancy, Kyu-hyoun Kim, Edgar R. Cordero |
2021-12-14 |
| 11182262 |
Efficient and selective sparing of bits in memory systems |
Stephen P. Glancy, Kyu-hyoun Kim, Kevin M. Mcilvain |
2021-11-23 |
| 11037619 |
Using dual channel memory as single channel memory with spares |
Kyu-hyoun Kim, Kevin M. Mcilvain, Saravanan Sethuraman |
2021-06-15 |
| 11017875 |
Tracking address ranges for computer memory errors |
John S. Dodson, Marc A. Gollub, Brad W. Michael |
2021-05-25 |
| 10971246 |
Performing error correction in computer memory |
John S. Dodson, Marc A. Gollub, Brad W. Michael |
2021-04-06 |
| 10937485 |
Redundant voltage regulator for memory devices |
Brian J. Connolly, Kyu-hyoun Kim |
2021-03-02 |
| 10901839 |
Common high and low random bit error correction logic |
James A. O'Connor, Barry M. Trager, Brad W. Michael, Marc A. Gollub, Patrick J. Meaney |
2021-01-26 |
