Issued Patents 2021
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11099601 | Reducing latency of memory read operations returning data on a read data path across multiple clock boundaries, to a host implementing a high speed serial interface | Susan M. Eickhoff, Michael B. Spear, Gary A. Van Huben, Stephen D. Wyatt | 2021-08-24 |
| 11088782 | Use of a cyclic redundancy code multiple-input shift register to provide early warning and fail detection | Patrick J. Meaney, Gary A. Van Huben | 2021-08-10 |
| 11042325 | Speculative bank activate dynamic random access memory (DRAM) scheduler | Jie Zheng, William J. Starke, Jeffrey A. Stuecheli, Stephen J. Powell | 2021-06-22 |
| 10976939 | Address/command chip synchronized autonomous data chip address sequencer for a distributed buffer memory system | Susan M. Eickhoff, Patrick J. Meaney, Stephen J. Powell, Gary A. Van Huben, Jie Zheng | 2021-04-13 |
| 10929213 | Residue prediction of packed data | Petra Leber, Daniel Lipetz, Silvia M. Mueller | 2021-02-23 |
| 10915385 | Residue prediction of packed data | Petra Leber, Daniel Lipetz, Silvia M. Mueller | 2021-02-09 |