MP

Mitchell G. Poplack

CS Cadence Design Systems: 8 patents #2 of 250Top 1%
📍 San Jose, CA: #248 of 6,693 inventorsTop 4%
🗺 California: #1,782 of 66,859 inventorsTop 3%
Overall (2021): #12,296 of 548,734Top 3%
8
Patents 2021

Issued Patents 2021

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
11194942 Emulation system supporting four-state for sequential logic circuits Yuhei Hayashi 2021-12-07
11176018 Inline hardware compression subsystem for emulation trace data Aruna Aluri, Linwei Ding 2021-11-16
11156660 In-system scan test of electronic devices Xiaolei Guo, Phung Truong, Justin Schmelzer 2021-10-26
11106846 Systems and methods for emulation data array compaction Yuhei Hayashi 2021-08-31
11048843 Dynamic netlist modification of compacted data arrays in an emulation system Yuhei Hayashi 2021-06-29
11042500 Systems and methods for high-speed data transfer over a communication interface Xiaolei Guo 2021-06-22
10997343 In-system scan test of chips in an emulation system Xiaolei Guo, Phung Truong, Justin Schmelzer 2021-05-04
10990728 Functional built-in self-test architecture in an emulation system Yuhei Hayashi 2021-04-27