JG

Jhih-Rong Gao

CS Cadence Design Systems: 2 patents #23 of 250Top 10%
🗺 Texas: #2,895 of 16,780 inventorsTop 20%
Overall (2021): #149,811 of 548,734Top 30%
2
Patents 2021

Issued Patents 2021

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
10963620 Buffer insertion technique to consider edge spacing and stack via design rules Yi-Xiao Ding, Zhuo Li 2021-03-30
10936777 Unified improvement scoring calculation for rebuffering an integrated circuit design Yi-Xiao Ding, Zhuo Li 2021-03-02