Issued Patents 2020
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10849352 | Coffee bean roasting-degree distribution measuring device and method | Meng Fang Yu | 2020-12-01 |
| 10833082 | HVMOS reliability evaluation using bulk resistances as indices | Chi-Feng Huang, Tse-Hua Lu | 2020-11-10 |
| 10804228 | RF switch on high resistive substrate | Chi-Feng Huang, Shu Fang Fu, Tzu-Jin Yeh, Chewn-Pu Jou | 2020-10-13 |
| 10784781 | Transistor having asymmetric threshold voltage, buck converter and method of forming semiconductor device | Chu Fu Chen, Chi-Feng Huang, Chin-Lung Chen, Victor Chiang Liang, Chia-Cheng Pao | 2020-09-22 |
| 10741553 | Method of making a high speed semiconductor device | Shu Fang Fu, Chi-Feng Huang, Victor Chiang Liang, Fu-Huan Tsai | 2020-08-11 |
| 10672873 | Semiconductor device and method of fabricating the same | Chi-Feng Huang, Victor Chiang Liang, Chung-Hao Chu | 2020-06-02 |
| 10658478 | Semiconductor device | Chi-Feng Huang, Victor Chiang Liang, Meng-Chang Ho, Chung-Hao Chu, Tz-Hau Guo | 2020-05-19 |
| 10658477 | Junction gate field-effect transistor (JFET) having source/drain and gate isolation regions | Chi-Feng Huang, Victor Chiang Liang | 2020-05-19 |
| 10622351 | Semiconductor device and manufacturing method thereof | Victor Chiang Liang, Chi-Feng Huang, Chun-Pei Wu, Fu-Huan Tsai, Chung-Hao Chu +3 more | 2020-04-14 |
| 10553721 | Semiconductor device and method of forming the same | Chewn-Pu Jou, Tzu-Jin Yeh | 2020-02-04 |
| 10529711 | Buried channel semiconductor device and method for manufacturing the same | Chi-Feng Huang, Victor Chiang Liang, Fu-Huan Tsai, Hsieh-Hung Hsieh, Tzu-Jin Yeh +2 more | 2020-01-07 |