Issued Patents 2020
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10700669 | Avoiding very low duty cycles in a divided clock generated by a frequency divider | Nigesh Baladhandapani, Sharanaprasad Melkundi, Augusto Marques | 2020-06-30 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10700669 | Avoiding very low duty cycles in a divided clock generated by a frequency divider | Nigesh Baladhandapani, Sharanaprasad Melkundi, Augusto Marques | 2020-06-30 |