Issued Patents 2020
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10749532 | Method and apparatus for a phase locked loop circuit | Mayank Raj, Didem Z. Turker Melek, Parag Upadhyaya, Yohan Frans | 2020-08-18 |
| 10712770 | Clock phase aligner for high speed data serializers | Ping-Chuan Chiang, Kee Hian Tan, Arianne Roldan, Nakul Narang, Yipeng Wang +1 more | 2020-07-14 |
| 10559561 | Isolation enhancement with on-die slot-line on power/ground grid structure | Zhaoyin D. Wu, Parag Upadhyaya | 2020-02-11 |