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Positive logic switch with selectable DC blocking circuit |
Tero Tapio Ranta |
2020-12-08 |
| 10784818 |
Body tie optimization for stacked transistor amplifier |
Chris Olson, Tero Tapio Ranta |
2020-09-22 |
| 10770480 |
Systems, methods, and apparatus for enabling high voltage circuits |
Buddhika Abesingha, Alain Duvallet, Merlin Green, Sivakumar KUMARASAMY |
2020-09-08 |
| 10763257 |
S-contact for SOI |
Befruz Tasbas, Alain Duvallet, Sinan Goktepeli |
2020-09-01 |
| 10756166 |
Low leakage FET |
Abhijeet Paul, Alain Duvallet |
2020-08-25 |
| 10700642 |
Gate drivers for stacked transistor amplifiers |
Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff |
2020-06-30 |
| 10672726 |
Transient stabilized SOI FETs |
Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta |
2020-06-02 |
| 10630280 |
AC coupling modules for bias ladders |
Tero Tapio Ranta |
2020-04-21 |
| 10629621 |
Butted body contact for SOI transistor |
— |
2020-04-21 |
| 10546747 |
Managed substrate effects for stabilized SOI FETs |
Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta |
2020-01-28 |