Issued Patents 2020
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10878893 | Control architecture for column decoder circuitry | Vianney Choserot, Andy Wangkun Chen, Sriram Thyagarajan, Munish Kumar | 2020-12-29 |
| 10873324 | Pulse stretcher circuitry | Shri Sagar Dwivedi, Fakhruddin Ali Bohra, Lalit Gupta, Gus Yeung | 2020-12-22 |
| 10861575 | Memory with a controllable I/O functional unit | Rajiv Kumar Sisodia, Renu Rawat, Paul Darren Hoxey, Vikash, Kumaraswamy Ramanathan +1 more | 2020-12-08 |
| 10854280 | Read assist circuitry for memory applications | Abhairaj Singh, Vivek Asthana, Monu Rathore, Ankur Goel, Nikhil Kaushik +3 more | 2020-12-01 |
| 10847211 | Latch circuitry for memory applications | Andy Wangkun Chen, Teresa Louise McLaurin, Frank David Frederick, Richard Slobodnik | 2020-11-24 |
| 10847215 | Bitcell shifting technique | Andy Wangkun Chen | 2020-11-24 |
| 10839934 | Redundancy circuitry for memory application | Rahul Mathur, Andy Wangkun Chen, Gaurang Prabhakar Narvekar, Sanjay Mangal, Bikas Maiti +1 more | 2020-11-17 |
| 10817420 | Apparatus and method to access a memory location | Sriram Thyagarajan, Andy Wangkun Chen | 2020-10-27 |
| 10796053 | Computer implemented system and method for generating a layout of a cell defining a circuit component | Paul Christopher de Dood, Marlin Wayne Frederick, Jr., Jerry C. Wang, Brian Tracy Cline, Xiaoqing Xu +6 more | 2020-10-06 |
| 10763267 | Memory structure with multi-cell poly pitch | Sriram Thyagarajan, Munish Kumar | 2020-09-01 |
| 10756753 | Data compressor logic circuit | Shardendu Shekhar, Andy Wangkun Chen | 2020-08-25 |
| 10665591 | Transistor gate arrangement to modify driver signal characteristics | Sriram Thyagarajan, Kumaraswamy Ramanathan, Damayanti Datta | 2020-05-26 |
| 10535386 | Level shifter with bypass | Andy Wangkun Chen, Rahul Mathur, Abhishek Baradia, Hsin-Yu Chen | 2020-01-14 |