Issued Patents 2020
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10775836 | Method for cycle accurate data transfer in a skewed synchronous clock domain | Gyan Prakash | 2020-09-15 |
| 10725681 | Method for calibrating the read latency of a DDR DRAM module | Gyan Prakash, Chandrashekar Narla, Praphul Malige | 2020-07-28 |